OTA-C signal delay compensation circuit for transimpedance-mode audio signal processing systems
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F23%3APU148079" target="_blank" >RIV/00216305:26220/23:PU148079 - isvavai.cz</a>
Result on the web
<a href="https://www.sciencedirect.com/science/article/pii/S0167926023000305" target="_blank" >https://www.sciencedirect.com/science/article/pii/S0167926023000305</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1016/j.vlsi.2023.02.005" target="_blank" >10.1016/j.vlsi.2023.02.005</a>
Alternative languages
Result language
angličtina
Original language name
OTA-C signal delay compensation circuit for transimpedance-mode audio signal processing systems
Original language description
This paper proposes an operational transconductance amplifier-capacitor-based (OTA-C) negative group delay (NGD) circuit for transimpedance-mode systems. The application areas extend from audio to sensor signal anticipation. Post-layout simulated NGD value of about 200 mu s to 100 ns is observed to be achievable with three different capacitor values without any resistive passive components. The operation range varies from 700 Hz to 700 kHz. The NGD and the operation range are shown to be flexible without gain dependency. An example design is built for a specific NGD value of 15 mu s and time-domain analysis is done with both a single-tone sinusoidal and a band-limited audio record in the range of 1 Hz-7 kHz. The calculated Root Mean Square Error for audio input to the system is only 4.70%.
Czech name
—
Czech description
—
Classification
Type
J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database
CEP classification
—
OECD FORD branch
20200 - Electrical engineering, Electronic engineering, Information engineering
Result continuities
Project
—
Continuities
S - Specificky vyzkum na vysokych skolach
Others
Publication year
2023
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Name of the periodical
INTEGRATION-THE VLSI JOURNAL
ISSN
0167-9260
e-ISSN
1872-7522
Volume of the periodical
90
Issue of the periodical within the volume
2023
Country of publishing house
NL - THE KINGDOM OF THE NETHERLANDS
Number of pages
9
Pages from-to
205-213
UT code for WoS article
000949061300001
EID of the result in the Scopus database
2-s2.0-85148543889