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Design Space Exploration of Parallel Embedded Applications Based on Performance-Oriented Specifications

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F02%3APU36184" target="_blank" >RIV/00216305:26230/02:PU36184 - isvavai.cz</a>

  • Result on the web

  • DOI - Digital Object Identifier

Alternative languages

  • Result language

    angličtina

  • Original language name

    Design Space Exploration of Parallel Embedded Applications Based on Performance-Oriented Specifications

  • Original language description

    The choice of HW/SW multiprocessor architecture for a specific embedded application is not an easy task due to many possible processing elements, type of their interconnection, various partitioning of the code and data and mapping them on processing elements. The paper addresses this issue and uses a single CSP-based simulation tool Transim for multiple architectures. Exploration of a vast design space for a generally heterogeneous network of processing elements is quick, because only first-order effectts can be considered. Variations in processor count, clock rate, link speed, bus bandwidth, cache line size, as well as in partitioning and mapping the resulting sw components to processors can be easily accounted for. The technique is demonstrated on solution of large dense systems of linear equations in real time.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

    JC - Computer hardware and software

  • OECD FORD branch

Result continuities

  • Project

    <a href="/en/project/GA102%2F02%2F0503" target="_blank" >GA102/02/0503: Parallel performance prediction and tuning</a><br>

  • Continuities

    Z - Vyzkumny zamer (s odkazem do CEZ)

Others

  • Publication year

    2002

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Proceedings of the Joint Workshop on Formal Specifications of Computer-Based Systems

  • ISBN

    1-85769-169-5

  • ISSN

  • e-ISSN

  • Number of pages

    5

  • Pages from-to

    71-75

  • Publisher name

    University of Stirling

  • Place of publication

    Stirling

  • Event location

    Lund

  • Event date

    Apr 8, 2002

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article