An Efficient List-Based Scheduling Algorithm for High-Level-Synthesis

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F02%3APU36234" target="_blank" >RIV/00216305:26230/02:PU36234 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

An Efficient List-Based Scheduling Algorithm for High-Level-Synthesis

Original language description

Scheduling is considered as the most important task in high-level synthesis process. This paper presents a novel list-based scheduling algorithm based on incorporating some information extracted from data flow graph (DFG) structure to guide the schedulerto find near-optimal/optimal schedules quickly.

Czech name

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Czech description

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Type

D - Article in proceedings

CEP classification

JC - Computer hardware and software

OECD FORD branch

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Project

<a href="/en/project/GA102%2F01%2F1531" target="_blank" >GA102/01/1531: Formal approaches in digital circuit diagnostics - testable design verification</a><br>

Continuities

Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year

2002

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

EUROMICRO Symposium on Digital System Design (DSD2002): Architecture, Methods and Tools, IEEE Computer Society

ISBN

0-7695-1790-0

ISSN

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e-ISSN

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Number of pages

8

Pages from-to

316-323

Publisher name

IEEE Computer Society Press

Place of publication

Dortmund, Germany

Event location

Dortmund

Event date

Sep 4, 2002

Type of event by nationality

WRD - Celosvětová akce

UT code for WoS article

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