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A Pipeline Scheduling Algorithm for High-Level Synthesis

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F03%3APU42504" target="_blank" >RIV/00216305:26230/03:PU42504 - isvavai.cz</a>

  • Result on the web

  • DOI - Digital Object Identifier

Alternative languages

  • Result language

    angličtina

  • Original language name

    A Pipeline Scheduling Algorithm for High-Level Synthesis

  • Original language description

    Scheduling is the most important task in high-level synthesis process, while pipelining is highly important for realising high-performance digital components. This paper presents a pipeline list-based scheduling algorithm, which performs forward and backward pipelining. The forward priority function is based on incorporating some information extracted from data flow graph (DFG) structure to guide the scheduler to find near-optimal/optimal schedules quickly. The algorithm has a flexible procedure cycle,which allows designers to make efficient area-performance trade-offs by using different strategies employed. Designers can choose between doing forward / backward pipelining with or without resource sharing combined with clock cycle selection, pipe stagedelay determination. Experimental results with standard benchmarks show the effectiveness of the proposed algorithm.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

    JC - Computer hardware and software

  • OECD FORD branch

Result continuities

  • Project

    <a href="/en/project/GA102%2F01%2F1531" target="_blank" >GA102/01/1531: Formal approaches in digital circuit diagnostics - testable design verification</a><br>

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Others

  • Publication year

    2003

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Proc. of IFAC Workshop on Programmable Devices and Systems Conference

  • ISBN

  • ISSN

  • e-ISSN

  • Number of pages

    6

  • Pages from-to

    178-183

  • Publisher name

    NEUVEDEN

  • Place of publication

    Ostrava

  • Event location

    Ostrava

  • Event date

    Feb 11, 2003

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article