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Novel Hardware Implementation of Adaptive Median Filters

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F08%3APU76701" target="_blank" >RIV/00216305:26230/08:PU76701 - isvavai.cz</a>

  • Result on the web

  • DOI - Digital Object Identifier

Alternative languages

  • Result language

    angličtina

  • Original language name

    Novel Hardware Implementation of Adaptive Median Filters

  • Original language description

    <p align=left>A new FPGA implementation for adaptive median filters is proposed. Adaptive median filters exhibit better filtering properties than standard median filters; however, their implementation cost is higher. Proposed architecture was optimized for throughput allowing 300M pixels to be filtered per second. The best performance/cost ratio exhibits the adaptive median filter which utilizes filtering window 7x7 pixels and can suppress shot noise with intensity up to 60%. In addition to filtering, adaptive median filters can be also used as detectors of corrupted pixels (detection statistics).

  • Czech name

    Nová obvodová implementace adaptivního mediánového filtru

  • Czech description

    Článek popisuje novou implementaci adaptivního mediánového fitru v FPGA. Navržená architektura má propustnost 300M pixelů/s a je použitelná pro potlačení výstřelového šumu s intenzitou až 60%.&nbsp;

Classification

  • Type

    D - Article in proceedings

  • CEP classification

    JC - Computer hardware and software

  • OECD FORD branch

Result continuities

  • Project

    <a href="/en/project/GA102%2F07%2F0850" target="_blank" >GA102/07/0850: Design and hardware implementation of a patent-invention machine</a><br>

  • Continuities

    Z - Vyzkumny zamer (s odkazem do CEZ)

Others

  • Publication year

    2008

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Proc. of 2008 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop

  • ISBN

    978-1-4244-2276-0

  • ISSN

  • e-ISSN

  • Number of pages

    6

  • Pages from-to

  • Publisher name

    IEEE Computer Society

  • Place of publication

    Bratislava

  • Event location

    Bratislava

  • Event date

    Apr 16, 2008

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article