The Design of Hardware Checkers for Verification and Diagnostic Purposes
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F08%3APU76731" target="_blank" >RIV/00216305:26230/08:PU76731 - isvavai.cz</a>
Result on the web
—
DOI - Digital Object Identifier
—
Alternative languages
Result language
angličtina
Original language name
The Design of Hardware Checkers for Verification and Diagnostic Purposes
Original language description
In the paper, a survey of our research activities the goal of which is to develop a methodology allowing to design on-line checkers of digital components is described. First, our experiments with PSL language and FoCs tool are demonstrated. It is shown how PSL can be used to describe conditions to be checked by an on-line checker of a digital component. It is demonstrated that checkers generated from PSL description demand more sources than the unit under check which is seen as unacceptable result. Theprinciples of our approach based on developing a formal language to describe the functions to be checked and a compiler which transforms the description into VHDL code are explained.
Czech name
The Design of Hardware Checkers for Verification and Diagnostic Purposes
Czech description
In the paper, a survey of our research activities the goal of which is to develop a methodology allowing to design on-line checkers of digital components is described. First, our experiments with PSL language and FoCs tool are demonstrated. It is shown how PSL can be used to describe conditions to be checked by an on-line checker of a digital component. It is demonstrated that checkers generated from PSL description demand more sources than the unit under check which is seen as unacceptable result. Theprinciples of our approach based on developing a formal language to describe the functions to be checked and a compiler which transforms the description into VHDL code are explained.
Classification
Type
D - Article in proceedings
CEP classification
JC - Computer hardware and software
OECD FORD branch
—
Result continuities
Project
<a href="/en/project/GD102%2F05%2FH050" target="_blank" >GD102/05/H050: Integrated Approach to Education of PhD Students in the Area of Parallel and Distributed Systems</a><br>
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)
Others
Publication year
2008
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
CSE'2008 International Scientific Conference on Computer Science and Engineering
ISBN
978-80-8086-092-9
ISSN
—
e-ISSN
—
Number of pages
7
Pages from-to
—
Publisher name
The University of Technology Košice
Place of publication
High Tatras - Stará Lesná
Event location
High Tatras - Stará Lesná
Event date
Sep 24, 2008
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
—