Testability Analysis Driven Data Path Modification And Controller Synthesis

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F09%3APU82663" target="_blank" >RIV/00216305:26230/09:PU82663 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Testability Analysis Driven Data Path Modification And Controller Synthesis
Original language description
In the paper, it is shown how testability analysis can be utilized both to modify digital data path in order to maximally enhance its testability at minimal costs and to offer information applicable during automated synthesis of a controller used to apply a test to the modified data path.  Our method takes a circuit structure described by means of a net-list as an input. The net-list contains information about how instances of particular module types defined in component libraries are interconnected by means of their interfaces. In both the library and net-list, module types belonging to various description levels (gate, register-transfer, system-on-a-chip etc.) can be placed in order to model multilevel or mixed designs. At the output of the method, modified data path and corresponding controller are produced.
Czech name
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Czech description
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Publication year
2009
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proceedings of 16th Electronic Devices and Systems IMAPS CS International Conference
ISBN
978-80-214-3933-7
ISSN
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e-ISSN
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Number of pages
6
Pages from-to
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Publisher name
Brno University of Technology
Place of publication
Brno
Event location
Brno
Event date
Sep 2, 2009
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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