Dependable Controller Design using Polymorphic Counters
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F09%3APU82711" target="_blank" >RIV/00216305:26230/09:PU82711 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Dependable Controller Design using Polymorphic Counters
Original language description
This paper proposes utilisation of polymorphic electronics to design dependable digital circuit controllers. The controller of a general digital circuit is an implementation of a finite state machine. One of most popular implementation is based on a synchronous digital counter. The counter consists of flip-flops and some glue logic. In proposed approach, the glue logic is designed using polymorphic gates. Polymorphic gates exhibit two or more logic functions in according to a specific condition (e.g. Vdd level or special signals). This allows to make a smart reconfiguration of the circuit designed using polymorphic gates. The controller based on this approach can be then reconfigured very easily and by this, it can respond to (potentially inconvenient)environment circumstances.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
JC - Computer hardware and software
OECD FORD branch
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Result continuities
Project
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Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)
Others
Publication year
2009
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proc. of 12th Euromicro Conference on Digital System Design
ISBN
978-0-7695-3782-5
ISSN
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e-ISSN
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Number of pages
8
Pages from-to
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Publisher name
IEEE Computer Society
Place of publication
Los Alamitos
Event location
Patras
Event date
Aug 27, 2009
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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