Fast and Energy Efficient Image Processing Algorithms using FPGA

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F11%3APU96106" target="_blank" >RIV/00216305:26230/11:PU96106 - isvavai.cz</a>
Result on the web
<a href="http://www.techfak.uni-bielefeld.de/~fwerner/fpl2011/abstracts/FPL11-CVW08.pdf" target="_blank" >http://www.techfak.uni-bielefeld.de/~fwerner/fpl2011/abstracts/FPL11-CVW08.pdf</a>
DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Fast and Energy Efficient Image Processing Algorithms using FPGA
Original language description
This contribution presents examples of image processing algorithms in programmable hardware (FPGA), specifically precise image resampling and object detection in images based on machine learning. The algorithms are examples of designs that benefit from implementation in programmable hardware, specifically in overall performance and power consumption. The contribution describes the algorithms, explains how they benefit from implementation in FPGA, and shows some results.
Czech name
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Czech description
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Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)<br>S - Specificky vyzkum na vysokych skolach

Publication year
2011
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proceedings of the 21th Conference on Field Programmable Logic and Applications Workshop
ISBN
978-0-7695-4529-5
ISSN
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e-ISSN
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Number of pages
2
Pages from-to
35-36
Publisher name
Institute of Electrical and Electronics Engineers
Place of publication
Chania
Event location
Chania
Event date
Sep 5, 2011
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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