Evolvable hardware

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F12%3APU101844" target="_blank" >RIV/00216305:26230/12:PU101844 - isvavai.cz</a>
Result on the web
<a href="http://dx.doi.org/10.1007/978-3-540-92910-9" target="_blank" >http://dx.doi.org/10.1007/978-3-540-92910-9</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1007/978-3-540-92910-9" target="_blank" >10.1007/978-3-540-92910-9</a>

Result language
angličtina
Original language name
Evolvable hardware
Original language description
This chapter surveys the field of evolvable hardware. After a brief overview of the reconfigurable devices used in evolvable hardware, elementary principles of evolvable hardware, corresponding terminology, and open problems in the field are introduced.Then, the chapter is divided into three main parts: extrinsic evolution, intrinsic evolution, and adaptive hardware. Extrinsic evolution (i.e., evolution using simulators) covers evolutionary design of digital circuits, analog circuits, antennas, opticalsystems, and microelectromechanical systems (MEMS). Intrinsic evolution conducted in field programmable gate arrays (FPGAs), field programmable transistor arrays (FPTAs), field programmable analog arrays (FPAAs), and some unconventional devices is discussed together with a description of the most successful applications. Examples of real-world adaptive hardware systems are also presented. Finally, an overview of major achievements and problems is given.
Czech name
—
Czech description
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Project
<a href="/en/project/GA102%2F07%2F0850" target="_blank" >GA102/07/0850: Design and hardware implementation of a patent-invention machine</a><br>
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year
2012
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

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