Fault Tolerant CAN Bus Control System Implemented into FPGA and its synchronization after failure and recovery
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F13%3APU106431" target="_blank" >RIV/00216305:26230/13:PU106431 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Fault Tolerant CAN Bus Control System Implemented into FPGA and its synchronization after failure and recovery
Original language description
The paper describes CAN Bus system implementation into the FPGA with usage of CANAerospace protocol. Control system is designed as Fault-tolerant and tested by the SEU injection. Text further discusses about state synchronization issue, which occurs after the system reconfiguration. The basic principles for resolving the synchronization after recovery are described.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
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OECD FORD branch
10201 - Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)
Result continuities
Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>Z - Vyzkumny zamer (s odkazem do CEZ)<br>S - Specificky vyzkum na vysokych skolach
Others
Publication year
2013
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Počítačové architektury & diagnostika 2013
ISBN
978-80-261-0270-0
ISSN
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e-ISSN
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Number of pages
6
Pages from-to
21-26
Publisher name
University of West Bohemia in Pilsen
Place of publication
Plzeň
Event location
Teplá
Event date
Sep 9, 2013
Type of event by nationality
CST - Celostátní akce
UT code for WoS article
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