Evolutionary Approximation of Edge Detection Circuits

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F16%3APU121577" target="_blank" >RIV/00216305:26230/16:PU121577 - isvavai.cz</a>
Result on the web
<a href="http://www.fit.vutbr.cz/research/pubs/all.php?id=10998" target="_blank" >http://www.fit.vutbr.cz/research/pubs/all.php?id=10998</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1007/978-3-319-30668-1_2" target="_blank" >10.1007/978-3-319-30668-1_2</a>

Result language
angličtina
Original language name
Evolutionary Approximation of Edge Detection Circuits
Original language description
Approximate computing exploits the fact that many applications are inherently error resilient which means that some errors in their outputs can safely be exchanged for improving other parameters such as energy consumption or operation frequency. A new method based on evolutionary computing is proposed in this paper which enables to approximate edge detection circuits. Rather than evolving approximate edge detectors from scratch, key components of existing edge detector are replaced by their approximate versions obtained using Cartesian genetic programming (CGP). Various approximate edge detectors are then composed and their quality is evaluated using a database of images. The paper reports interesting edge detectors showing a good tradeoff between the quality of edge detection and implementation cost.
Czech name
—
Czech description
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Project
<a href="/en/project/GA16-17538S" target="_blank" >GA16-17538S: Relaxed equivalence checking for approximate computing</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2016
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

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