Automatic Design of Approximate Circuits by Means of Multi-Objective Evolutionary Algorithms
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F16%3APU121593" target="_blank" >RIV/00216305:26230/16:PU121593 - isvavai.cz</a>
Result on the web
<a href="http://www.fit.vutbr.cz/research/pubs/all.php?id=11080" target="_blank" >http://www.fit.vutbr.cz/research/pubs/all.php?id=11080</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/DTIS.2016.7483885" target="_blank" >10.1109/DTIS.2016.7483885</a>
Alternative languages
Result language
angličtina
Original language name
Automatic Design of Approximate Circuits by Means of Multi-Objective Evolutionary Algorithms
Original language description
Recently, power efficiency has become the most important parameter of many real circuits. At the same time, a wide range of applications capable of tolerating imperfections has spread out especially in multimedia. Approximate computing, an emerging paradigm, takes advantage of relaxed functionality requirements to make computer systems more efficient in terms of energy consumption, speed or complexity. As a result, a variety of trade-offs between error and efficiency can be found. In this paper, a design method based on a multi-objective evolutionary algorithm is proposed. For a given circuit, the method is able to produce a set of Pareto optimal solutions in terms of the error, power consumption and delay. The proposed design method uses Cartesian Genetic Programming for the circuit representation and a modified NSGA-II algorithm for design space exploration. The method is used to design Pareto optimal approximate versions of arithmetic circuits such as multipliers and adders.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
IN - Informatics
OECD FORD branch
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Result continuities
Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2016
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proceedings of the 11th International Conference on Design & Technology of Integrated Systems in Nanoscale Era
ISBN
978-1-5090-0335-8
ISSN
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e-ISSN
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Number of pages
6
Pages from-to
239-244
Publisher name
Istanbul Sehir University
Place of publication
Istanbul
Event location
Istanbul
Event date
Apr 12, 2016
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000386756700022