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Implementation of Polymorphic Operators for Efficient Synthesis of Multifunctional Circuits

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F16%3APU122415" target="_blank" >RIV/00216305:26230/16:PU122415 - isvavai.cz</a>

  • Result on the web

    <a href="http://dx.doi.org/10.4236/jcc.2016.415015" target="_blank" >http://dx.doi.org/10.4236/jcc.2016.415015</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.4236/jcc.2016.415015" target="_blank" >10.4236/jcc.2016.415015</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    Implementation of Polymorphic Operators for Efficient Synthesis of Multifunctional Circuits

  • Original language description

    Systematic effort dedicated to the exploration of feasible ways how to permanently come up with even more space-efficient implementation of digital circuits based on conventional CMOS technology node may soon  reach the ultimate point, which is mostly given by the constraints associated with physical scaling of fundamental electronic components. One of the possible ways how to mitigate this problem can be recognized in deployment of multifunctional circuit elements. In addition, the polymorphic electronics paradigm, with its considerable independence on a particular technology, opens a way how to fulfil this objective through the  adoption of emerging semiconductor materials and advanced synthesis methods.   In this paper, main attention is focused on the introduction of polymorphic operators (i.e. digital logic gates) that would allow to further increase the efficiency of multifunctional circuit synthesis   techniques. Key aspect depicting the novelty of the proposed approach is primarily based on the intrinsic exploitation of components with ambipolar conduction property. Finally, relevant models of the polymorphic operators are presented in conjunction with the experimental results.

  • Czech name

  • Czech description

Classification

  • Type

    J<sub>ost</sub> - Miscellaneous article in a specialist periodical

  • CEP classification

  • OECD FORD branch

    20206 - Computer hardware and architecture

Result continuities

  • Project

    <a href="/en/project/LD14055" target="_blank" >LD14055: Unconventional Design Techniques for Intrinsic Reconfiguration of Digital Circuits: From Materials to Implementation</a><br>

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Others

  • Publication year

    2016

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Name of the periodical

    Journal of Computer and Communications

  • ISSN

    2327-5227

  • e-ISSN

  • Volume of the periodical

    4

  • Issue of the periodical within the volume

    15

  • Country of publishing house

    CN - CHINA

  • Number of pages

    9

  • Pages from-to

    151-159

  • UT code for WoS article

  • EID of the result in the Scopus database