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Toward Efficient Synthesis Method of Multifunctional Logic Circuits

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F15%3APU117263" target="_blank" >RIV/00216305:26230/15:PU117263 - isvavai.cz</a>

  • Result on the web

    <a href="http://dx.doi.org/10.1109/ICM.2015.7437977" target="_blank" >http://dx.doi.org/10.1109/ICM.2015.7437977</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1109/ICM.2015.7437977" target="_blank" >10.1109/ICM.2015.7437977</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    Toward Efficient Synthesis Method of Multifunctional Logic Circuits

  • Original language description

    The continuous effort how to achieve space-efficient implementation of a digital circuits may soon arrive at the physical limits behind the scaling of fundamental building components. One possible response to this problem can be recognized in adoption of so called multifunctional logic, which also comes with the intrinsically embedded reconfiguration features. Polymorphic electronics concept with its substantial technological independence opens a way to fulfil this objective through the adoption of emerging semiconductor technologies and advanced synthesis methods. This paper is dealing with a proposal of a novel synthesis method oriented on the exploitation of polymorphic electronics principles. Key part of it is based on Boolean divisor identification and function kernelling technique. Proposed method is evaluated with several test circuits.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

  • OECD FORD branch

    20206 - Computer hardware and architecture

Result continuities

  • Project

    <a href="/en/project/LD14055" target="_blank" >LD14055: Unconventional Design Techniques for Intrinsic Reconfiguration of Digital Circuits: From Materials to Implementation</a><br>

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach

Others

  • Publication year

    2015

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Proceedings of the 27th International Conference on Microelectronics (ICM 2015)

  • ISBN

    978-1-4673-8759-0

  • ISSN

  • e-ISSN

  • Number of pages

    4

  • Pages from-to

    21-24

  • Publisher name

    IEEE Computer Society

  • Place of publication

    Casablanca

  • Event location

    Farah Golden Tulip, Casablanca

  • Event date

    Dec 20, 2015

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article

    000380432600006