Hardware Acceleration of Intrusion Detection Systems for High-Speed Networks
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F18%3APU130730" target="_blank" >RIV/00216305:26230/18:PU130730 - isvavai.cz</a>
Result on the web
<a href="https://www.fit.vut.cz/research/publication/11796/" target="_blank" >https://www.fit.vut.cz/research/publication/11796/</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1145/3230718.3232114" target="_blank" >10.1145/3230718.3232114</a>
Alternative languages
Result language
angličtina
Original language name
Hardware Acceleration of Intrusion Detection Systems for High-Speed Networks
Original language description
Intrusion Detection Systems (IDS) are among popular technologies for securing computer networks. However, their high computational complexity makes it hard to meet performance goals of modern high-speed networks. This paper aims at an acceleration of IDS by informed packet discarding. Focusing the limited computational resources available to IDS towards only the most relevant parts of incoming traffic and offloading (bypassing) the rest. We show that this controlled (informed) discarding of well-defined traffic portions helps IDS to achieve better results and compare software and FPGA accelerated discarding implementations.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
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OECD FORD branch
20206 - Computer hardware and architecture
Result continuities
Project
<a href="/en/project/LQ1602" target="_blank" >LQ1602: IT4Innovations excellence in science</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2018
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proceedings of the 2018 Symposium on Architectures for Networking and Communications Systems
ISBN
978-1-4503-5902-3
ISSN
—
e-ISSN
—
Number of pages
2
Pages from-to
177-178
Publisher name
Association for Computing Machinery
Place of publication
Ithaca, NY
Event location
Ithaca, NY
Event date
Jul 23, 2018
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000474465600026