A Fast Design Space Exploration Framework for the Deep Learning Accelerators: Work-in-Progress

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F20%3APU138643" target="_blank" >RIV/00216305:26230/20:PU138643 - isvavai.cz</a>

Result on the web

<a href="https://www.fit.vut.cz/research/publication/12420/" target="_blank" >https://www.fit.vut.cz/research/publication/12420/</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1109/CODESISSS51650.2020.9244038" target="_blank" >10.1109/CODESISSS51650.2020.9244038</a>

Result language

angličtina

Original language name

A Fast Design Space Exploration Framework for the Deep Learning Accelerators: Work-in-Progress

Original language description

The Capsule Networks (CapsNets) is an advanced form of Convolutional Neural Network (CNN), capable of learning spatial relations and being invariant to transformations. CapsNets requires complex matrix operations which current accelerators are not optimized for, concerning both training and inference passes. Current state-of-the-art simulators and design space exploration (DSE) tools for DNN hardware neglect the modeling of training operations, while requiring long exploration times that slow down the complete design flow. These impediments restrict the real-world applications of CapsNets (e.g., autonomous driving and robotics) as well as the further development of DNNs in life-long learning scenarios that require training on low-power embedded devices. Towards this, we present XploreDL , a novel framework to perform fast yet high-fidelity DSE for both inference and training accelerators, supporting both CNNs and CapsNets operations. XploreDL enables a resource-efficient DSE for accelerators, focusing on power, area, and latency, highlighting Pareto-optimal solutions which can be a green-lit to expedite the design flow. XploreDL can reach the same fidelity as ARM's SCALE-sim, while providing 600x speedup and having a 50x lower memory-footprint. Preliminary results with a deep CapsNet model on MNIST for training accelerators show promising Pareto-optimal architectures with up to 0.4 TOPS/squared-mm and 800 fJ/op efficiency. With inference accelerators for AlexNet the Pareto-optimal solutions reach up to 1.8 TOPS/squared-mm and 200 fJ/op efficiency.

Czech name

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Czech description

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Type

D - Article in proceedings

CEP classification

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OECD FORD branch

10201 - Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)

Project

—

Continuities

S - Specificky vyzkum na vysokych skolach

Publication year

2020

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)}

ISBN

978-1-7281-9198-0

ISSN

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e-ISSN

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Number of pages

3

Pages from-to

34-36

Publisher name

Institute of Electrical and Electronics Engineers

Place of publication

Singapore

Event location

Singapore

Event date

Oct 12, 2020

Type of event by nationality

WRD - Celosvětová akce

UT code for WoS article

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