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Automatically-Designed Fault-Tolerant Systems: Failed Partitions Recovery

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F21%3APU142922" target="_blank" >RIV/00216305:26230/21:PU142922 - isvavai.cz</a>

  • Result on the web

    <a href="https://www.fit.vut.cz/research/publication/12529/" target="_blank" >https://www.fit.vut.cz/research/publication/12529/</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1109/EWDTS52692.2021.9580996" target="_blank" >10.1109/EWDTS52692.2021.9580996</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    Automatically-Designed Fault-Tolerant Systems: Failed Partitions Recovery

  • Original language description

    This paper presents and describes our design automation toolkit for automatic synthesis of fault tolerant systems from unhardened systems. The toolkit is composed of various parts and tools and its aim is to design its internal algorithms in such way to be reusable among different HW description languages. In this paper, VHDL description is used to present the possibilities of the toolkit. The experimental part of the paper presents automatic synthesis of a benchmark system into a limited chip area. The optimization goal was to maximize the median time to failure (a.k.a. t50) parameter. The main part of the experimental activities comprises incorporation of a partial dynamic reconfiguration controller into the system design to recover the selected component of the system. Two systems utilizing recovery with the usage of the FPGA dynamic reconfiguration technique show promising results in terms of reliability. The recovered system, in which the controller is apart of the FPGA (e.g. in a different radiation-hardened chip), achieves by 70% better t50 parameter, compared to the system without recovery.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

  • OECD FORD branch

    20206 - Computer hardware and architecture

Result continuities

  • Project

  • Continuities

    S - Specificky vyzkum na vysokych skolach

Others

  • Publication year

    2021

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    2021 IEEE East-West Design and Test Symposium, EWDTS 2021 - Proceedings

  • ISBN

    978-1-6654-4503-0

  • ISSN

  • e-ISSN

  • Number of pages

    8

  • Pages from-to

    26-33

  • Publisher name

    Institute of Electrical and Electronics Engineers

  • Place of publication

    Batumi

  • Event location

    Batumi

  • Event date

    Sep 10, 2021

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article