Nonlinear Compression Codes Used In IC Testing

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F46747885%3A24220%2F19%3A00006730" target="_blank" >RIV/46747885:24220/19:00006730 - isvavai.cz</a>

Result on the web

<a href="http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8724661&isnumber=8724630" target="_blank" >http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8724661&isnumber=8724630</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1109/DDECS.2019.8724661" target="_blank" >10.1109/DDECS.2019.8724661</a>

Result language

angličtina

Original language name

Nonlinear Compression Codes Used In IC Testing

Original language description

It was found that the linear binary codes can be extended by a relatively high number of nonlinear check bits in such a way that the code words preserve the value of the maximum number of independently specified bits from the original linear code words. These extended nonlinear binary codes can be used for pattern compression and decompression. The number of scan chains loaded in parallel from the sequential decompressor may be increased while the number of specified bits is kept. The nonlinear structures guarantee the number of independently specified bits within the whole decompressed test pattern independently on the scan chain clock cycle for a substantially higher number of parallel scan chains than the linear decompressors while the number of bits transferred from the tester is kept. We proposed an algorithm that finds the appropriate nonlinear modification circuit of the sequential decompressor and verifies the test pattern quality for different numbers of care bits in a test pattern.

Czech name

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Czech description

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Type

D - Article in proceedings

CEP classification

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OECD FORD branch

10201 - Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)

Project

—

Continuities

I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Publication year

2019

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

Proceedings - 2019 22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2019

ISBN

978-1-72810-073-9

ISSN

—

e-ISSN

—

Number of pages

4

Pages from-to

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Publisher name

IEEE

Place of publication

NEW YORK, USA

Event location

Cluj-Napoca

Event date

Jan 1, 2019

Type of event by nationality

WRD - Celosvětová akce

UT code for WoS article

000492839800025