One New Architecture of Fractional Frequency Synthesizer

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F49777513%3A23220%2F08%3A00501073" target="_blank" >RIV/49777513:23220/08:00501073 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
One New Architecture of Fractional Frequency Synthesizer
Original language description
This paper describes a new architecture of a digital fractional frequency synthesizer based on generators, counters and a register. The technique described here is much simpler then other method. Presented synthesizer is the most suitable for the designof VLSI architectures or for programmable Large Scale Integration (or in-system programmable Large Scale Integration). On the other hand, this synthesizer has a disadvantage in low output frequency, but this can be overcome by using this synthesizer together with phase locked loop.
Czech name
Nová architektura frekvenčního syntezátoru se zlomkovou frekvencí
Czech description
Příspěvek popisuje nový typ frekvenčního syntezátoru se zlomkovou frekvencí. Princip je jednodušší než ostatní metody a je vhodný pro VLSI technologii.

Project
<a href="/en/project/GA102%2F07%2F0147" target="_blank" >GA102/07/0147: Dynamical interactions of magnetic field with solid and liquid mechanical systems</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2008
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

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