Frequency synthesizer based on counters

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F49777513%3A23640%2F03%3A00000036" target="_blank" >RIV/49777513:23640/03:00000036 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Frequency synthesizer based on counters

Original language description

This paper describes architecture a new pure digital frequency synthesizer based on generators, counters and a register. The technique described here is much simpler then other method. Presented synthesizer is the most suitable for the design of VLSI architectures or for programmable Large Scale Integration. On the other hand, this synthesizer has a disadvantage in low output frequency, but this can be overcome by using this synthesizer together with phase locked lop.

Czech name

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Czech description

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Type

D - Article in proceedings

CEP classification

JA - Electronics and optoelectronics

OECD FORD branch

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Project

<a href="/en/project/LN00B084" target="_blank" >LN00B084: Research Centre for New Technologies in the Region of West Bohemia</a><br>

Continuities

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year

2003

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

Measurement 2003

ISBN

80-967402-6-1

ISSN

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e-ISSN

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Number of pages

4

Pages from-to

439-442

Publisher name

Slovak Technical University

Place of publication

Bratislava

Event location

Smolenice

Event date

Jun 12, 2003

Type of event by nationality

WRD - Celosvětová akce

UT code for WoS article

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