Fractional Frequency Synthesizer Using Flying Adder Principle
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F49777513%3A23220%2F11%3A43898493" target="_blank" >RIV/49777513:23220/11:43898493 - isvavai.cz</a>
Result on the web
<a href="http://dx.doi.org/10.1109/TSP.2011.6043723" target="_blank" >http://dx.doi.org/10.1109/TSP.2011.6043723</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/TSP.2011.6043723" target="_blank" >10.1109/TSP.2011.6043723</a>
Alternative languages
Result language
angličtina
Original language name
Fractional Frequency Synthesizer Using Flying Adder Principle
Original language description
The frequency synthesis is one of the most important and most actively researched subjects in the field of VLSI mixed-signal circuit design. Among the existing techniques in this area, phase locked loop fractional architecture is a widely used one for generating frequencies which are not integer multiple of the input reference frequency. Flying-Adder architecture is an emerging technique which is based on a new concept time-average-frequency, to generate frequencies. This paper presents simple fractional frequency synthesizer architecture based on concept flying-adder and phase locked loop principle. The simulation results concerning this approach are presented.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
JA - Electronics and optoelectronics
OECD FORD branch
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Result continuities
Project
<a href="/en/project/ED2.1.00%2F03.0094" target="_blank" >ED2.1.00/03.0094: Regional Innovation Centre for Electrical Engineering (RICE)</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2011
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
TSP 34th International Conference on Telecommunications and Signal Processing
ISBN
978-1-4577-1411-5
ISSN
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e-ISSN
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Number of pages
4
Pages from-to
294-297
Publisher name
IEEE
Place of publication
VUT Brno
Event location
Budapest
Event date
Aug 18, 2011
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000299568700061