Floating Capacitance Multiplier Based on DVCC

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F60162694%3AG43__%2F18%3A00535302" target="_blank" >RIV/60162694:G43__/18:00535302 - isvavai.cz</a>
Result on the web
<a href="https://ieeexplore.ieee.org/document/8441403" target="_blank" >https://ieeexplore.ieee.org/document/8441403</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/TSP.2018.8441403" target="_blank" >10.1109/TSP.2018.8441403</a>

Result language
angličtina
Original language name
Floating Capacitance Multiplier Based on DVCC
Original language description
The paper presents the resistor-less implementation of a floating capacitance multiplier circuit using one simple active element, DVCC (Differential Voltage Current Conveyor), and one grounded reference capacitor. Capacitance Multipliers are used in the design of integrated circuits for the implementation of high-value on-chip capacitances. The capacitance multiplier can save valuable space on the chip. For test reasons, the active element is composed of commercial amplifiers, and the verification is ensured by SPICE simulations.
Czech name
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Czech description
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Project
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Continuities
I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Publication year
2018
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
41st International Conference on Telecommunications and Signal Processing
ISBN
978-1-5386-4695-3
ISSN
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e-ISSN
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Number of pages
4
Pages from-to
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Publisher name
Institute of Electrical and Electronics Engineers Inc.
Place of publication
Athens, Greece
Event location
Athens, Greece
Event date
Jul 4, 2018
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000454845100018

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