All-Solution-Processed Van der Waals Heterostructures for Wafer-Scale Electronics

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F60461373%3A22310%2F22%3A43924163" target="_blank" >RIV/60461373:22310/22:43924163 - isvavai.cz</a>

Result on the web

<a href="https://onlinelibrary.wiley.com/doi/full/10.1002/adma.202106110" target="_blank" >https://onlinelibrary.wiley.com/doi/full/10.1002/adma.202106110</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1002/adma.202106110" target="_blank" >10.1002/adma.202106110</a>

Result language

angličtina

Original language name

All-Solution-Processed Van der Waals Heterostructures for Wafer-Scale Electronics

Original language description

2D van der Waals (vdW) materials have been considered as potential building blocks for use in fundamental elements of electronic and optoelectronic devices, such as electrodes, channels, and dielectrics, because of their diverse and remarkable electrical properties. Furthermore, two or more building blocks of different electronic types can be stacked vertically to generate vdW heterostructures with desired electrical behaviors. However, such fundamental approaches cannot directly be applied practically because of issues such as precise alignment/positioning and large-quantity material production. Here, these limitations are overcome and wafer-scale vdW heterostructures are demonstrated by exploiting the lateral and vertical assembly of solution-processed 2D vdW materials. The high exfoliation yield of the molecular intercalation-assisted approach enables the production of micrometer-sized nanosheets in large quantities and its lateral assembly in a wafer-scale via vdW interactions. Subsequently, the laterally assembled vdW thin-films are vertically assembled to demonstrate various electronic device applications, such as transistors and photodetectors. Furthermore, multidimensional vdW heterostructures are demonstrated by integrating 1D carbon nanotubes as a p-type semiconductor to fabricate p-n diodes and complementary logic gates. Finally, electronic devices are fabricated via inkjet printing as a lithography-free manner based on the stable nanomaterial dispersions.

Czech name

—

Czech description

—

Type

J_imp - Article in a specialist periodical, which is included in the Web of Science database

CEP classification

—

OECD FORD branch

10405 - Electrochemistry (dry cells, batteries, fuel cells, corrosion metals, electrolysis)

Project

Result was created during the realization of more than one project. More information in the Projects tab.

Continuities

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year

2022

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Name of the periodical

Advanced Materials

ISSN

0935-9648

e-ISSN

1521-4095

Volume of the periodical

34

Issue of the periodical within the volume

12

Country of publishing house

DE - GERMANY

Number of pages

13

Pages from-to

nestrankovano

UT code for WoS article

000752275800001

EID of the result in the Scopus database

2-s2.0-85124559369