Simple hardware implementation of voltage balancing in capacitor-clamped inverter

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F61388998%3A_____%2F09%3A00335309" target="_blank" >RIV/61388998:_____/09:00335309 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Simple hardware implementation of voltage balancing in capacitor-clamped inverter

Original language description

The basic principle of voltage balancing in capacitor-clamped voltage source inverters (VSIs) is explained and a simple balancing algorithm, which is very suitable for hardware implementation, is proposed. The function of the suggested algorithm is verified in all usual steady and transient states of the induction motor drive by computer simulations of an 850 kW drive and also by experiments on a small 2.2 kW drive. The unbalancing across flying caps can occur only due to very fast transients in dc link. The balancing method is designed to preserve all benefits of the standard space-vector modulation and simultaneously to prevent an increase in VSI average switching frequency above the PWM carrier frequency.

Czech name

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Czech description

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Type

J_x - Unclassified - Peer-reviewed scientific article (Jimp, Jsc and Jost)

CEP classification

JA - Electronics and optoelectronics

OECD FORD branch

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Project

<a href="/en/project/FT-TA4%2F077" target="_blank" >FT-TA4/077: *Universal industrial drive with high-voltage induction motor.</a><br>

Continuities

Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year

2009

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Name of the periodical

Acta Technica CSAV

ISSN

0001-7043

e-ISSN

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Volume of the periodical

54

Issue of the periodical within the volume

4

Country of publishing house

CZ - CZECH REPUBLIC

Number of pages

17

Pages from-to

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UT code for WoS article

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EID of the result in the Scopus database

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