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Circuit for the fast analysis of packet headers transferred via a data bus

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F63839172%3A_____%2F17%3A10132996" target="_blank" >RIV/63839172:_____/17:10132996 - isvavai.cz</a>

  • Result on the web

  • DOI - Digital Object Identifier

Alternative languages

  • Result language

    angličtina

  • Original language name

    Circuit for the fast analysis of packet headers transferred via a data bus

  • Original language description

    The presented solution deals with the processing of packets in computer networks. The basic information about a packet is stored in its header, which needs to be analyzed prior to the further processing of the packet. Therefore, the solution deals with the sphere of telecommunications technology and services. The patent is used in the industry under a license agreement.

  • Czech name

  • Czech description

Classification

  • Type

    P - Patent

  • CEP classification

  • OECD FORD branch

    20206 - Computer hardware and architecture

Result continuities

  • Project

  • Continuities

    I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Others

  • Publication year

    2017

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Patent/design ID

    2654261

  • Publisher

    EPO_1 -

  • Publisher name

    European Patent Office

  • Place of publication

    Munich, The Hague, Berlin, Vienna, Brussels

  • Publication country

  • Date of acceptance

    Dec 22, 2017

  • Owner name

    CESNET, zájmové sdružení právnických osob

  • Method of use

    B - Výsledek je využíván orgány státní nebo veřejné správy

  • Usage type

    A - K využití výsledku jiným subjektem je vždy nutné nabytí licence