Floating-Point-Like Arithmetic for FPGA.

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F67985556%3A_____%2F02%3A16020082" target="_blank" >RIV/67985556:_____/02:16020082 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Floating-Point-Like Arithmetic for FPGA.

Original language description

In recent years we have investigated the use of a logarithmic number representation as an alternative to floating-point. Efficient techniques have been developed to facilitate arithmetic comparable to single precision floating-point in the logarithmic domain.

Czech name

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Czech description

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Type

D - Article in proceedings

CEP classification

JC - Computer hardware and software

OECD FORD branch

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Project

<a href="/en/project/LN00B096" target="_blank" >LN00B096: Center for Applied Cybernetics</a><br>

Continuities

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year

2002

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

POSTER 2002.

ISBN

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ISSN

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e-ISSN

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Number of pages

1

Pages from-to

2

Publisher name

FEL ČVUT

Place of publication

Praha

Event location

Praha [CZ]

Event date

May 23, 2002

Type of event by nationality

WRD - Celosvětová akce

UT code for WoS article

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