Dynamic reconfiguration of FPGAs.
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F67985556%3A_____%2F03%3A16030111" target="_blank" >RIV/67985556:_____/03:16030111 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Dynamic reconfiguration of FPGAs.
Original language description
Dymnamic reconfiguration of FPGA devices has been an issue of the last decade. Althouth this new feature of currently available devices permits more robust and flexible designs, it has not been recognized by professionals. This paper disscussed demands placed by dynamic reconfiguration on design tools as well as on designes themselves. A case study is presented for the Atmel AT94K family and the supplied design tools, and values are provided that should aid in analyzing such designs.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
JC - Computer hardware and software
OECD FORD branch
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Result continuities
Project
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Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)
Others
Publication year
2003
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Recent Trends in Multimedia Information Processing. Proceedings.
ISBN
80-86645-05-3
ISSN
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e-ISSN
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Number of pages
4
Pages from-to
288-291
Publisher name
Czech Technical University
Place of publication
Prague
Event location
Praha [CZ]
Event date
Sep 10, 2003
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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