Foreground Detection and Image Segmentation in a Flexible ASVP Platform for FPGAs

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F67985556%3A_____%2F12%3A00382187" target="_blank" >RIV/67985556:_____/12:00382187 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Foreground Detection and Image Segmentation in a Flexible ASVP Platform for FPGAs
Original language description
This demonstration shows an early prototype of low-level image processing to be used in an embedded smart camera, that is foreground detection and image segmentation. The example uses camera with resolution 640x480 pixels for input images processed at 100MHz in the FPGA. The input can be easily extended to higher resolutions. The processed output is displayed on LCD screen.
Czech name
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Czech description
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Project
<a href="/en/project/7H10001" target="_blank" >7H10001: Smart Multicore Embedded SYstems</a><br>
Continuities
I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Publication year
2012
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proceedings of the 2012 Conference on Design & Architectures for Signal & Image Processing
ISBN
978-2-9539987-2-6
ISSN
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e-ISSN
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Number of pages
2
Pages from-to
375-376
Publisher name
Electronic Chips & Systems design Initiative
Place of publication
Gi?res
Event location
Karlsruhe
Event date
Oct 23, 2012
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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