Computers in phase locked loops (PLL) design.

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F67985882%3A_____%2F00%3A13000058" target="_blank" >RIV/67985882:_____/00:13000058 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Computers in phase locked loops (PLL) design.

Original language description

In the contribution are shown advantages of computer simulation of the Bode plots. This technique provides much quicker and more precise information about the gain and phase margins of the investigated PLL. It is pointed out that computer plotting of theopen loop gain G(s) can also provide information about PLL transfer functions H(s) and 1-H(s), and about noise properties in respect to the used VCO (voltage controlled oscillator).

Czech name

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Czech description

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Type

D - Article in proceedings

CEP classification

JA - Electronics and optoelectronics

OECD FORD branch

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Project

<a href="/en/project/GA102%2F00%2F0958" target="_blank" >GA102/00/0958: Investigation of frequency stability of local generators</a><br>

Continuities

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year

2000

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

Radioelektronika 2000. Conference Proceedings.

ISBN

80-227-1389-9

ISSN

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e-ISSN

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Number of pages

4

Pages from-to

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Publisher name

Department of Radio and Electronics, FEI STU Bratislava

Place of publication

Bratislava

Event location

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Event date

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Type of event by nationality

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UT code for WoS article

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