Large Scale Error Reduction in Dithered ADC

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F00%3A03022076" target="_blank" >RIV/68407700:21230/00:03022076 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Large Scale Error Reduction in Dithered ADC

Original language description

The combination of dithering and correcting table is the way of improvement not only of ADC resolution but also of linearity - effective number of bits. Dithering is used to reduce small-scale errors, such as quantization error, while correcting table reduces large-scale errors. The contribution describes design and practical experience with ADC unit based on single-chip micro-controller 80C552 that uses above described correction procedure. Sub-quantum accuracy has been achieved.

Czech name

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Czech description

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Type

D - Article in proceedings

CEP classification

JA - Electronics and optoelectronics

OECD FORD branch

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Project

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Continuities

Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year

2000

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

XVI IMEKO World Congress IMEKO 2000 - EWADC'2000

ISBN

3-901888-12-8

ISSN

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e-ISSN

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Number of pages

6

Pages from-to

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Publisher name

TU Wien, Abteilung Austauschbau und Messtechnik

Place of publication

Wien

Event location

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Event date

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Type of event by nationality

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UT code for WoS article

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