Practical Experience with Linearity Improvement in Dithered ADC

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F00%3A03021958" target="_blank" >RIV/68407700:21230/00:03021958 - isvavai.cz</a>

Alternative codes found

RIV/68407700:21230/00:03061958

Result on the web

—

DOI - Digital Object Identifier

—

Result language

angličtina

Original language name

Practical Experience with Linearity Improvement in Dithered ADC

Original language description

The paper deals with practical verification of combination of dithering and static correcting table. Such combination contributes significantly to linearity of Analog-to-Digital Converter (ADC). In the described case, the number of effective bits has been enhanced from 9,2 to 13,9. Nominally 10-bit ADC with successive approximation has been used.

Czech name

—

Czech description

—

Type

D - Article in proceedings

CEP classification

JA - Electronics and optoelectronics

OECD FORD branch

—

Project

<a href="/en/project/GA102%2F99%2F0775" target="_blank" >GA102/99/0775: Metrological assurance of precision digitizers</a><br>

Continuities

Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year

2000

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

BEC 2000 - Baltic Electronics Conference

ISBN

9985-59-179-8

ISSN

—

e-ISSN

—

Number of pages

4

Pages from-to

—

Publisher name

Tallinn Technical University

Place of publication

Tallinn

Event location

—

Event date

—

Type of event by nationality

—

UT code for WoS article

—