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Expressing the MESFET and Transmission Line Delays Using Bessel Function

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F03%3A03088613" target="_blank" >RIV/68407700:21230/03:03088613 - isvavai.cz</a>

  • Result on the web

  • DOI - Digital Object Identifier

Alternative languages

  • Result language

    angličtina

  • Original language name

    Expressing the MESFET and Transmission Line Delays Using Bessel Function

  • Original language description

    At present, the majority of circuit simulation programs can define the MESFET gate delay. However, the delay is mostly approximated by means of first order differential equations. In the paper, a more precise way is proposed using an appropriate second order differential equation. Concerning the transmission line delay, the majority of the programs can use both Branin (lossless) and LC (lossy) models. The first model however results in extreme simulation times and the second one causes the well-known spurious oscillations in the simulation results. In the paper, an unusual way for modeling the transmission line delay also based on the second order differential equation is defined. The proposed model does not create the spurious oscillations and the simulation times are comparable with those using the classical LC model.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

    JA - Electronics and optoelectronics

  • OECD FORD branch

Result continuities

  • Project

    <a href="/en/project/GA102%2F01%2F0432" target="_blank" >GA102/01/0432: Symbolic, semisymbolic and numerical methods of analysis, design and optimization of electrical circuits</a><br>

  • Continuities

    Z - Vyzkumny zamer (s odkazem do CEZ)

Others

  • Publication year

    2003

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    ECCTD'03 Proceedings of the European Conference on Circuit Theory and Design 2003

  • ISBN

    83-88309-95-1

  • ISSN

  • e-ISSN

  • Number of pages

    4

  • Pages from-to

  • Publisher name

    IEEE Circuits and Systems Society

  • Place of publication

    Monterey

  • Event location

    Krakow

  • Event date

    Sep 1, 2003

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article