Logical Circuit Design in Many-Valued Logic
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F03%3A03103396" target="_blank" >RIV/68407700:21230/03:03103396 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Logical Circuit Design in Many-Valued Logic
Original language description
We present a method of finding optimized normal forms of functions in many-valued logic. Our approach is based on an extension of the set od logical connectives, a generalization of the technique of Svoboda maps and a generalization of the Quine-McCluskey algorithm. We show the application of these tools to the design of many-valued logical circuits including many-valued flip-flops.
Czech name
Není k dispozici
Czech description
Není k dispozici
Classification
Type
D - Article in proceedings
CEP classification
JD - Use of computers, robotics and its application
OECD FORD branch
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Result continuities
Project
<a href="/en/project/GA201%2F02%2F1540" target="_blank" >GA201/02/1540: Many-valued logics for soft computing</a><br>
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)
Others
Publication year
2003
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
ISCAM 2003: International Conference in Applied Mathematics for Undergraduate and Graduate Students
ISBN
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ISSN
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e-ISSN
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Number of pages
1
Pages from-to
29-29
Publisher name
FEI, Slovak University of Technology
Place of publication
Bratislava
Event location
Bratislava
Event date
Apr 11, 2003
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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