Reconfigurable System-on-a-Programmeable-Chip Platform
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F04%3A03097017" target="_blank" >RIV/68407700:21230/04:03097017 - isvavai.cz</a>
Result on the web
—
DOI - Digital Object Identifier
—
Alternative languages
Result language
angličtina
Original language name
Reconfigurable System-on-a-Programmeable-Chip Platform
Original language description
This paper presents a universal reconfigurable SOPC platform based on a combination of the Atmel AT94K FPSLIC device and an external memory. The presented platform increases the power of the FPSLIC device both by extending the internal address space through an introduction of a virtual program memory and by providing a transparent infrastructure for FPGA reconfiguration. The platform is demonstrated on two simple designs that demonstrate both aspects.
Czech name
Není k dispozici
Czech description
Není k dispozici
Classification
Type
D - Article in proceedings
CEP classification
JC - Computer hardware and software
OECD FORD branch
—
Result continuities
Project
<a href="/en/project/GA102%2F04%2F2137" target="_blank" >GA102/04/2137: Design of highly reliable control systems built on dynamically reconfigurable FPGAs.</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2004
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proceedings of IEEE Design and Diagnostics of Electronics Circuits and Systems Workshop
ISBN
80-969117-9-1
ISSN
—
e-ISSN
—
Number of pages
8
Pages from-to
21-28
Publisher name
Institute of Informatics, Slovak Akademy of Sciences, Bratislava
Place of publication
Stará Lesná
Event location
Stará Lesná
Event date
Apr 18, 2004
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
—