FPGA Implementation of Arithmetic Unit for Modular Arithmetic
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F04%3A03098784" target="_blank" >RIV/68407700:21230/04:03098784 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
FPGA Implementation of Arithmetic Unit for Modular Arithmetic
Original language description
FPGA Implementation of Arithmetic Unit for Modular Arithmetic
Czech name
Není k dispozici
Czech description
Není k dispozici
Classification
Type
D - Article in proceedings
CEP classification
JC - Computer hardware and software
OECD FORD branch
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Result continuities
Project
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Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)
Others
Publication year
2004
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
DDECS - Proceedings of 7th IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop
ISBN
80-969117-9-1
ISSN
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e-ISSN
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Number of pages
4
Pages from-to
187-190
Publisher name
Institute of Informatics, Slovak Akademy of Sciences, Bratislava
Place of publication
Stará Lesná
Event location
Stará Lesná
Event date
Apr 18, 2004
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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