Many-valued memory circuits-implementation in the model of many-valued logical circuits

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F07%3A03150866" target="_blank" >RIV/68407700:21230/07:03150866 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Many-valued memory circuits-implementation in the model of many-valued logical circuits

Original language description

In this presentation, a memory circuit (flip-flop) build in the model of many-valued logical circuits is presented. The design of the memory circuit is based on finding an appropriate many-valued logical operation which replaces the Sheffer resp. Pierceoperation which is used in the R-S memory circuit known from the two-valued logical circuits. We prove that, in the ideal case, the generalized many-valued R-S memory circuit can store and hold any logical value from the real interval [0,1] in a similarway as the two valued R-S memory circuit. The proposed many-valued R-S memory circuit allows moreover to design a many-valued level-controlled memory circuit and a many-valued edge-controlled memory circuit. Problems of the stability of the memory circuit with respect to small errors of input signals and to small errors of the gates are discussed. It is shown that unstability of the gates may violate the proper functionality of the circuit. Nevertheless, the problem can be solved by rest

Czech name

Many-valued memory circuits-implementation in the model of many-valued logical circuits

Czech description

In this presentation, a memory circuit (flip-flop) build in the model of many-valued logical circuits is presented. The design of the memory circuit is based on finding an appropriate many-valued logical operation which replaces the Sheffer resp. Pierceoperation which is used in the R-S memory circuit known from the two-valued logical circuits. We prove that, in the ideal case, the generalized many-valued R-S memory circuit can store and hold any logical value from the real interval [0,1] in a similarway as the two valued R-S memory circuit. The proposed many-valued R-S memory circuit allows moreover to design a many-valued level-controlled memory circuit and a many-valued edge-controlled memory circuit. Problems of the stability of the memory circuit with respect to small errors of input signals and to small errors of the gates are discussed. It is shown that unstability of the gates may violate the proper functionality of the circuit. Nevertheless, the problem can be solved by rest

Type

D - Article in proceedings

CEP classification

JD - Use of computers, robotics and its application

OECD FORD branch

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Project

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Continuities

S - Specificky vyzkum na vysokych skolach

Publication year

2007

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

MEMICS proceedings 2007

ISBN

978-80-7355-077-6

ISSN

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e-ISSN

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Number of pages

1

Pages from-to

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Publisher name

Masarykova univerzita

Place of publication

Brno

Event location

Znojmo

Event date

Oct 26, 2007

Type of event by nationality

EUR - Evropská akce

UT code for WoS article

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