Efficient Implementation of the THSOM Neural Network
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F08%3A03145832" target="_blank" >RIV/68407700:21230/08:03145832 - isvavai.cz</a>
Result on the web
—
DOI - Digital Object Identifier
—
Alternative languages
Result language
angličtina
Original language name
Efficient Implementation of the THSOM Neural Network
Original language description
Recent trends in microprocessor design clearly show that the multicore processors are the answer to the question how to scale up the processing power of today's computers. In this article we present our C implementation of the Temporal Hebbian Self-organizing Map (THSOM) neural network. This kind of neural networks have growing computational complexity for larger networks, therefore we present different approaches to the parallel processing -- instruction based parallelism and data-based parallelism ortheir combination. Our C implementation of THSOM is modular and multi-platform, allowing us to move critical parts of the algorithm to other cores, platforms or use different levels of the instruction parallelism yet still run exactly the same computational flows -- maintaining good comparability between different setups. For our experiments, we have chosen a multicore x86 system.
Czech name
Efektivní implementace neuronové sítě THSOM
Czech description
Recent trends in microprocessor design clearly show that the multicore processors are the answer to the question how to scale up the processing power of today's computers. In this article we present our C implementation of the Temporal Hebbian Self-organizing Map (THSOM) neural network. This kind of neural networks have growing computational complexity for larger networks, therefore we present different approaches to the parallel processing -- instruction based parallelism and data-based parallelism ortheir combination. Our C implementation of THSOM is modular and multi-platform, allowing us to move critical parts of the algorithm to other cores, platforms or use different levels of the instruction parallelism yet still run exactly the same computational flows -- maintaining good comparability between different setups. For our experiments, we have chosen a multicore x86 system.
Classification
Type
D - Article in proceedings
CEP classification
IN - Informatics
OECD FORD branch
—
Result continuities
Project
—
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)
Others
Publication year
2008
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Artificial Neural Networks - ICANN 2008
ISBN
978-3-540-87558-1
ISSN
0302-9743
e-ISSN
—
Number of pages
10
Pages from-to
—
Publisher name
Springer
Place of publication
Heidelberg
Event location
Prague
Event date
Sep 3, 2008
Type of event by nationality
EUR - Evropská akce
UT code for WoS article
000259567200017