Educational Tutorial for Analysis of Electronic Circuits in Mentor Graphics System

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F10%3A00171955" target="_blank" >RIV/68407700:21230/10:00171955 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Educational Tutorial for Analysis of Electronic Circuits in Mentor Graphics System

Original language description

The main target of this article is a brief description of the content of proposed web based educational tutorial. The tutorial should help to better orientation of students in such a complex software, that an IC Development system from Mentor Graphics surely is. In several examples there will be introduced the main problems of synthesis, analysis and simulation of electronic circuits.

Czech name

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Czech description

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Type

D - Article in proceedings

CEP classification

JA - Electronics and optoelectronics

OECD FORD branch

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Project

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Continuities

V - Vyzkumna aktivita podporovana z jinych verejnych zdroju

Publication year

2010

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

Digital Technologies 2010

ISBN

978-80-554-0304-5

ISSN

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e-ISSN

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Number of pages

2

Pages from-to

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Publisher name

TU v Žilině

Place of publication

Žilina

Event location

Žilina

Event date

Nov 11, 2010

Type of event by nationality

WRD - Celosvětová akce

UT code for WoS article

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