A more efficient arrangement of the sparse LU factorization for the large-scale circuit analysis

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F11%3A00184428" target="_blank" >RIV/68407700:21230/11:00184428 - isvavai.cz</a>
Result on the web
<a href="http://dx.doi.org/10.1109/VLSISoC.2011.6081619" target="_blank" >http://dx.doi.org/10.1109/VLSISoC.2011.6081619</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/VLSISoC.2011.6081619" target="_blank" >10.1109/VLSISoC.2011.6081619</a>

Result language
angličtina
Original language name
A more efficient arrangement of the sparse LU factorization for the large-scale circuit analysis
Original language description
In the paper, an efficient and reliable algorithm for solving the circuit nonlinear algebraic-differential equations based on a sophisticated arrangement of Newton interpolation polynomial is characterized first. After that, a novel method is introducedfor improving the convergence with four suggested criteria that are being compared. For enhancing the efficiency of repeated solutions of linear systems necessary in the Newton-Raphson method, a novel modification of the Markowitz criterion is suggested,which is compatible with the fast modes of the LU factorization. The modified criterion consists in an estimation of probabilities of the fill-in enlargement. The probabilities are determined for all columns of the system matrix before the LU factorization, where the column probability is calculated as the average value of the probabilities for all the column elements. Finally, the columns are reordered so that first and last should be those with the minimum and maximum probabilities.
Czech name
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Czech description
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Project
<a href="/en/project/GAP102%2F10%2F1614" target="_blank" >GAP102/10/1614: Memristive, memcapacitative, and meminductive systems: basic research, modeling, and simulation</a><br>
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)<br>S - Specificky vyzkum na vysokych skolach

Publication year
2011
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip
ISBN
978-1-4577-0170-2
ISSN
—
e-ISSN
—
Number of pages
6
Pages from-to
416-421
Publisher name
IEEE
Place of publication
Piscataway
Event location
Kowloon, Hong Kong
Event date
Oct 3, 2011
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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