Capacitor-less Linear Regulator with NMOS Power Transistor

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F13%3A00212002" target="_blank" >RIV/68407700:21230/13:00212002 - isvavai.cz</a>

Result on the web

<a href="http://147.228.94.30/images/PDF/Rocnik2013/Cislo5_2013/r7c5c8.pdf" target="_blank" >http://147.228.94.30/images/PDF/Rocnik2013/Cislo5_2013/r7c5c8.pdf</a>

DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Capacitor-less Linear Regulator with NMOS Power Transistor

Original language description

A 3.6 (4.3) V 50 mA capacitor-less linear voltage regulator for system on chip (SoC) is introduced. It does not require any external component and is stable in a wide range of load current. This regulator uses an NMOS transistor as the power element. Inorder to increase the gate voltage of the power element switched floating capacitor is used. The proposed linear regulator has been designed in a commercial 0.13 ?m CMOS technology. The variation of output voltage is less than 100 mV even if a full loadstep is applied and current consumption of this regulator is 150 ?A regardless of the load current.

Czech name

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Czech description

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Type

J_x - Unclassified - Peer-reviewed scientific article (Jimp, Jsc and Jost)

CEP classification

JA - Electronics and optoelectronics

OECD FORD branch

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Project

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Continuities

S - Specificky vyzkum na vysokych skolach

Publication year

2013

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Name of the periodical

ElectroScope

ISSN

1802-4564

e-ISSN

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Volume of the periodical

2013

Issue of the periodical within the volume

V.

Country of publishing house

CZ - CZECH REPUBLIC

Number of pages

6

Pages from-to

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UT code for WoS article

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EID of the result in the Scopus database

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