Combining PREM compilation and ILP scheduling for high-performance and predictable MPSoC execution

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F18%3A00323847" target="_blank" >RIV/68407700:21230/18:00323847 - isvavai.cz</a>

Alternative codes found

RIV/68407700:21730/18:00323847

Result on the web

<a href="http://dx.doi.org/10.1145/3178442.3178444" target="_blank" >http://dx.doi.org/10.1145/3178442.3178444</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1145/3178442.3178444" target="_blank" >10.1145/3178442.3178444</a>

Result language

angličtina

Original language name

Combining PREM compilation and ILP scheduling for high-performance and predictable MPSoC execution

Original language description

Many applications require both high performance and predictable timing. High-performance can be provided by COTS Multi-Core System on Chips (MPSoC), however, as cores in these systems share the memory bandwidth they are susceptible to interference from each other, which is a problem for timing predictability. We achieve predictability on multi-cores by employing the predictable execution model (PREM), which splits execution into a sequence of memory and compute phases, and schedules these such that only a single core is executing a memory phase at a time. We present a toolchain consisting of a compiler and an Integer Linear Programming scheduling model. Our compiler uses loop analysis and tiling to transform application code into PREM compliant binaries. Furthermore, we solve the problem of scheduling execution on multiple cores while preventing interference of memory phases. We evaluate our toolchain on Advanced-Driver-Assistance-Systems-like scenario containing matrix multiplications and FFT computations on NVIDIA TX1. The results show that our approach maintains similar average performance and improves variance of completion times by a factor of 9.

Czech name

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Czech description

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Type

D - Article in proceedings

CEP classification

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OECD FORD branch

10201 - Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)

Project

—

Continuities

R - Projekt Ramcoveho programu EK

Publication year

2018

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

Proceedings of the 9th International Workshop on Programming Models and Applications for Multicores and Manycores

ISBN

978-1-4503-5645-9

ISSN

—

e-ISSN

—

Number of pages

10

Pages from-to

11-20

Publisher name

Association for Computing Machinery

Place of publication

New York

Event location

Vídeň

Event date

Feb 24, 2018

Type of event by nationality

WRD - Celosvětová akce

UT code for WoS article

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