FPGA Accelerated Change-Point Detection Method for 100 Gb/s Networks

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F14%3A00221356" target="_blank" >RIV/68407700:21240/14:00221356 - isvavai.cz</a>
Alternative codes found
RIV/63839172:_____/14:10130397
Result on the web
<a href="http://www.memics.cz/2014/download/memics2014-proceedings.pdf" target="_blank" >http://www.memics.cz/2014/download/memics2014-proceedings.pdf</a>
DOI - Digital Object Identifier
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Result language
angličtina
Original language name
FPGA Accelerated Change-Point Detection Method for 100 Gb/s Networks
Original language description
The aim of this paper is a hardware realization of a statistical anomaly detection method as a part of high-speed monitoring probe for computer networks. The sequential Non-Parametric Cumulative Sum (NP-CUSUM) procedure is the detection method of our choice and we use an FPGA based accelerator card as the target platform. For rapid detection algorithm development, a high-level synthesis (HLS) approach is applied. Furthermore, we combine HLS with the usage of Software Defined Monitoring (SDM) framework on the monitoring probe, which enables easy deployment of various hardware-accelerated monitoring applications into high-speed networks. Our implementation of NP-CUSUM algorithm serves as hardware plug-in for SDM and realizes the detection of network attacks and anomalies directly in FPGA. Additionally, the parallel nature of the FPGA technology allows us to realize multiple different detections simultaneously without any losses in throughput. Our experimental results show the feasibility
Czech name
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Czech description
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Project
<a href="/en/project/LM2010005" target="_blank" >LM2010005: Large Infrastructure CESNET</a><br>
Continuities
V - Vyzkumna aktivita podporovana z jinych verejnych zdroju

Publication year
2014
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

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