A New Method for Path Criticality Calculation
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F16%3A00242674" target="_blank" >RIV/68407700:21240/16:00242674 - isvavai.cz</a>
Result on the web
<a href="http://dx.doi.org/10.1109/DDECS.2016.7482478" target="_blank" >http://dx.doi.org/10.1109/DDECS.2016.7482478</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/DDECS.2016.7482478" target="_blank" >10.1109/DDECS.2016.7482478</a>
Alternative languages
Result language
angličtina
Original language name
A New Method for Path Criticality Calculation
Original language description
Technology scaling and manufacturing process affect the performance of digital circuits, making them more vulnerable to environmental influences. Some defects are shown manifested as delay faults. Some various factors have impact to signal propagation delay. A new method is presented for determining factors impact measurement on the path delay in the digital circuits. The method is focused to find the best weights of the factors used as parameters for the PaCGen (Parameterized Critical Path Generator) system. PaCGen is used for critical paths selection based on static timing analysis data with impact of factors to propagation delay. Experimental results are provided using the ISCAS'89 benchmark circuits.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
JC - Computer hardware and software
OECD FORD branch
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Result continuities
Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2016
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)
ISBN
978-1-5090-2467-4
ISSN
2334-3133
e-ISSN
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Number of pages
4
Pages from-to
190-193
Publisher name
IEEE
Place of publication
Piscataway
Event location
Košice
Event date
Apr 20, 2016
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000387091100034