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Influence of fault-tolerant design methods on differential power analysis resistance of AES cipher: Methodics and challenges

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F16%3A00300664" target="_blank" >RIV/68407700:21240/16:00300664 - isvavai.cz</a>

  • Result on the web

    <a href="http://ieeexplore.ieee.org/document/7525685/" target="_blank" >http://ieeexplore.ieee.org/document/7525685/</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1109/MECO.2016.7525685" target="_blank" >10.1109/MECO.2016.7525685</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    Influence of fault-tolerant design methods on differential power analysis resistance of AES cipher: Methodics and challenges

  • Original language description

    Many electronic systems has to fulfill strict dependability properties, especially both fault tolerance and attack resistance. These requirements usually contradict each other. The study and experiment descriptions of the possible methods how to measure these impacts are presented in this paper. Specifically, how fault-tolerant design methods affects resistance against differential power analysis attack and how the whole design can be modified to increase attack resistance will be discussed.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

    JC - Computer hardware and software

  • OECD FORD branch

Result continuities

  • Project

    Result was created during the realization of more than one project. More information in the Projects tab.

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Others

  • Publication year

    2016

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Proceedings of the 5th Mediterranean Conference on Embedded Computing (MECO 2016)

  • ISBN

    978-1-5090-2220-5

  • ISSN

    2377-5475

  • e-ISSN

  • Number of pages

    4

  • Pages from-to

    14-17

  • Publisher name

    Institute of Electrical and Electronics Engineers

  • Place of publication

    Piscataway

  • Event location

    Bar

  • Event date

    Jun 12, 2016

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article

    000387159800009