Influence of Fault Tolerant Design Techniques on Resistance against Differential Power Analysis
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F17%3A00317312" target="_blank" >RIV/68407700:21240/17:00317312 - isvavai.cz</a>
Result on the web
<a href="https://labh-curien.univ-st-etienne.fr/cryptarchi/workshop17/presentations.html" target="_blank" >https://labh-curien.univ-st-etienne.fr/cryptarchi/workshop17/presentations.html</a>
DOI - Digital Object Identifier
—
Alternative languages
Result language
angličtina
Original language name
Influence of Fault Tolerant Design Techniques on Resistance against Differential Power Analysis
Original language description
Fault tolerance and attack resistance are design properties possibly demanded at the same time. There are many design methods providing one of these properties, but in both cases they introduce considerable area and power overhead. Unfortunately, the overhead of fault tolerant design could negatively influence the attack resistance and vice versa, the overhead of attack resistant design could negatively influence the fault tolerance. The main aim of this research is determination of the mutual influence and suggestion of new design methods combining both fault tolerance and attack resistance.
Czech name
—
Czech description
—
Classification
Type
O - Miscellaneous
CEP classification
—
OECD FORD branch
20206 - Computer hardware and architecture
Result continuities
Project
<a href="/en/project/GA16-05179S" target="_blank" >GA16-05179S: Fault-Tolerant and Attack-Resistant Architectures Based on Programmable Devices: Research of Interplay and Common Features</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2017
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů