Versatile Hardware Framework for Elliptic Curve Cryptography
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F22%3A00357690" target="_blank" >RIV/68407700:21240/22:00357690 - isvavai.cz</a>
Result on the web
<a href="http://hdl.handle.net/10467/100534" target="_blank" >http://hdl.handle.net/10467/100534</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/DDECS54261.2022.9770143" target="_blank" >10.1109/DDECS54261.2022.9770143</a>
Alternative languages
Result language
angličtina
Original language name
Versatile Hardware Framework for Elliptic Curve Cryptography
Original language description
We propose versatile hardware framework for ECC. The framework supports arithmetic operations over P-256, Ed25519 and Curve25519 curves, enabling easy implementation of various ECC algorithms. Framework finds its application area e.g. in FIDO2 attestation or in nowadays rapidly expanding field of hardware wallets. As the design is intended to be ASIC-ready, we designed it to be area efficient. Hardware units are reused for calculations in several finite fields, and some of them are superior to previously designed circuits in terms of time-area product. The framework implements several attack countermeasures. It enables implementation of certain countermeasures even in later stages of design. The design was validated on SoC FPGA.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
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OECD FORD branch
20206 - Computer hardware and architecture
Result continuities
Project
<a href="/en/project/VJ02010010" target="_blank" >VJ02010010: Tools for AI-enhanced Security Verification of Cryptographic Devices</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2022
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proceedings of the 2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
ISBN
978-1-6654-9431-1
ISSN
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e-ISSN
2473-2117
Number of pages
4
Pages from-to
80-83
Publisher name
IEEE
Place of publication
Piscataway
Event location
Praha
Event date
Apr 6, 2022
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000835725500014