Safety core approach for the system with high demands for a safety and reliability design in a partially dynamically reconfigurable field-programmable gate array (FPGA)

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21260%2F11%3A00187492" target="_blank" >RIV/68407700:21260/11:00187492 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Safety core approach for the system with high demands for a safety and reliability design in a partially dynamically reconfigurable field-programmable gate array (FPGA)

Original language description

This paper deals with a new approach to designing the micro-electronic system suitable for mass-parallel and neuronal structures realizations in which the high demand on safety and reliability is given. The presented concept is based on the FPGA platform. Authors point out various kinds of faults which can possibly occur during system cycle. Furthermore, authors introduce the Safety Core principle and define systems for which it is applicable. There are possibilities of using partial dynamic reconfiguration shown in this paper in the context of FPGA fabric testing, faults catching and correcting.

Czech name

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Czech description

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Type

J_x - Unclassified - Peer-reviewed scientific article (Jimp, Jsc and Jost)

CEP classification

JO - Land transport systems and equipment

OECD FORD branch

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Project

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Continuities

S - Specificky vyzkum na vysokych skolach

Publication year

2011

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Name of the periodical

Neural Network World

ISSN

1210-0552

e-ISSN

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Volume of the periodical

21

Issue of the periodical within the volume

5

Country of publishing house

CZ - CZECH REPUBLIC

Number of pages

8

Pages from-to

453-460

UT code for WoS article

000297179900005

EID of the result in the Scopus database

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