Dislocation-Induced Punchthrough Causing Drain-to-Source Leakage Current in Power VD MOSFET Structures

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21340%2F16%3A00311342" target="_blank" >RIV/68407700:21340/16:00311342 - isvavai.cz</a>

Result on the web

<a href="http://ieeexplore.ieee.org/document/7523322/?reload=true" target="_blank" >http://ieeexplore.ieee.org/document/7523322/?reload=true</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1109/TDMR.2016.2594484" target="_blank" >10.1109/TDMR.2016.2594484</a>

Result language

angličtina

Original language name

Dislocation-Induced Punchthrough Causing Drain-to-Source Leakage Current in Power VD MOSFET Structures

Original language description

A detailed characterization of the leakage in semiconductor devices is essential for proper adjustment of the manufacturing process in order to eliminate the leakage. Subsurface punchthrough was determined as the leakage current mechanism in the power vertical double-diffused metal-oxide-semiconductor field-effect-transistor, and the quadratic dependence of the drain current was confirmed for the leakage caused by the punchthrough. A failure analysis revealed a large number of dislocations located in the corners of transistor cells. The majority of the detected dislocations were electrically inactive. Dislocation depth measurement indicated that only a small number of the dislocations penetrated deep into the channel, i.e., penetrated from source area to the boron-doped p-transistor channel. The transistor channel shortening caused by the enhanced phosphorus diffusion along the dislocations was determined as the root cause of the leakage. The diffusion spikes of the phosphorus atoms lengthened the n+ source layer, and the interface of the n+ and p-layer was shifted into the transistor channel at the site of the dislocation. Manufacturing process experiments related to the channel lengthening and the channel doping confirmed the theory of the dislocation-induced channel shortening. The occurrence of dislocations was attributed to the surface stress induced by the improper conditions of oxide growing and plasma etching in the affected regions.

Czech name

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Czech description

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Type

J_imp - Article in a specialist periodical, which is included in the Web of Science database

CEP classification

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OECD FORD branch

20201 - Electrical and electronic engineering

Project

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Continuities

I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Publication year

2016

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Name of the periodical

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY

ISSN

1530-4388

e-ISSN

1558-2574

Volume of the periodical

16

Issue of the periodical within the volume

3

Country of publishing house

US - UNITED STATES

Number of pages

6

Pages from-to

396-401

UT code for WoS article

000384069500015

EID of the result in the Scopus database

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