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Formal Verification of Machine-Code Systems by Translation of Simulable Descriptions
verification. While formal verification of source-code and hardware systems is widely used, existing approaches to formal verification of machine code are severely limited in verification strengt...
Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)
- 2024 •
- D •
- Link
Rok uplatnění
D - Stať ve sborníku
Výsledek na webu
verification server
The verification server is a new software tool enabling the use of a new software verification method (automated formal verification). The verification server provides the services of individual formal...
Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)
- 2021 •
- R
Rok uplatnění
R - Software
Computer Go as a Verification Case Study
This paper discuss whether Computer Go can be understood as a verification case study. For finding the answer, we, at first, survey the area of formal verification Go for improving formal verification meth...
JC - Počítačový hardware a software
- 2006 •
- D
Rok uplatnění
D - Stať ve sborníku
A Road to a Formally Verified General-Purpose Operating System
Methods of formal description and verification represent a viable way several key design choices which should make the formal verification of an operating, however, was not designed specifically with formal
IN - Informatika
- 2010 •
- Jx
Rok uplatnění
Jx - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)
Automated formal verification
In the paper we give an overview of the current state in the formal verification of hardware and software systems with particular emphasis on model checking and its possibilities and limitations....
JC - Počítačový hardware a software
- 2002 •
- D
Rok uplatnění
D - Stať ve sborníku
Verification of COMBO6 VHDL Design
This technical report presents current results and experiences of the formal verification of VHDL design of Combo6 hardware accelerator card. Information about formal verification itself is enriched by description ...
IN - Informatika
- 2003 •
- A
Rok uplatnění
A - Audiovizuální tvorba
Formal Verification of Component-based Architectures - Motivation, Methods & Challenges
Invited lecture at FESCA 2010 workshop (see http://fesca.ipd.kit.edu/fesca2010/)dedicated to the problems of modelling and verification of compoment systems......
IN - Informatika
- 2010 •
- O
Rok uplatnění
O - Ostatní výsledky
Formal Verification of Annotated Textual Use-Cases
, they cannot be directly subject to a formal verification. In this article, we present a method (called Formal Verification of Annotated Use-Case Models, FOAM) for formal verification of use-case...
JC - Počítačový hardware a software
- 2015 •
- Jx •
- Link
Rok uplatnění
Jx - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)
Výsledek na webu
Methodology of E-learning Adaptive Hypermedia System Implementation: Automated Verification of Adaptive Course Output
Paper describes formal algorithm for automated verification of adaptive course output.
IN - Informatika
- 2005 •
- D
Rok uplatnění
D - Stať ve sborníku
Generative Programming with Support Formal Verification
This paper presents a novel approach to software development, mainly useful for embedded devices. Embedded software is described in a progamming language with very high level of abstraction. Efficient production code is generated from this descriptio...
JC - Počítačový hardware a software
- 2009 •
- D
Rok uplatnění
D - Stať ve sborníku
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